The technology disclosed in this specification relates to clock and data recovery circuits which extract data from data signals and recover clocks synchronized therewith.
Widespread use of multimedia technologies has led to an increasing demand for transferring a large amount of data at a high speed. Thus, attention is given to high-speed serial data interfaces, such as serial AT Attachment (ATA), Universal Serial Bus (USB), etc. High-speed serial data interfaces require reduction in the time needed for recovering clocks and data as the data transfer rates increase.
Examples of a circuit for performing data recovery using a multiphase clock are described in Japanese Patent Publication Nos. 2006-262165, 2007-184847, and 2004-128980.